SMTS, WMAC Design Engineer - Shanghai - China

The candidate for SMTS, WMAC Design Engineer should meet the following criteria:


  • ASIC design for Wi-Fi MAC.
  • Participate in development of micro architecture specification and RTL implementation of digital blocks. Responsible for all phases of design including design, verification, synthesis, timing closure and eco.
  • Work closely with the California teams.
  • Support chip tapeout and bring up.


  • At least 5 years ASIC design experience
  • BS in Electrical Engineering (or equivalent) is a must have, MSEE is desired.
  • Familiar with Verilog and System Verilog.
  • Design experience with Wireless MAC.
  • Working knowledge of networking protocols such as 802.11ac or 802.11n, TCP/IP, 802.3
  • Experience with Medium Access protocols.
  • Familiar with lint, CDC, formal verification methodologies.
  • Understanding of basic DFT concepts.
  • Hands on experience with synthesis and STA.
  • FPGA emulation experience a plus
  • Good communication and problem solving skills.
  • Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging

Please forward your resume to hr@quantenna.com. Please include the job title “STMS, WMAC Design Engineer - Shanghai” in the subject line.

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