Physical Design Manager - SanJose

Quantenna seeking a highly motivated individual responsible for the Managing Physical Design of complex high performance Wi-Fi Baseband Chipset across multiple process technologies. In this role, you will be the hands-on manager and technical lead, responsible for the Physical implementation of high performance Wi-Fi AP Chipset, driving all aspects from RTL to GDS including timing and physical sign-off. You will manage a small team of highly talented engineers across multiple locations and cultures.


  • MS in Electrical Engineering (or related discipline) desired.
  • Has 12 + years of hands-on physical design experience with recent contribution to project tape-outs on 28nm and smaller geometry, as a technical driver and as project lead.
  • Ability to Manage both internal teams and third party Vendors for successful tape-out.
  • Deliver Highly optimized low power yet high performance silicon.
  • Interact with Foundry and EDA tool vendors to establish Tools flow and resolve issues related to libraries and flows.
  • Has intimate knowledge of the full design cycle from RTL to GDSI for a complex Baseband SOC with mixed signal components.
  • Has solid engineering understanding of the underlying concepts of IC implementation flows and industry standard tools like Synopsys ICC and Cadence Innovus.
  • Has proven track record for technical steering of physical design Team for on-time delivery.
  • Has good communication skills, ability to think and communicate at different levels of abstraction, with peer groups as well as with vendors.
  • Has good software and scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.
To apply, please send your resume to: hr@quantenna.com. Please include the job title “Physical Design Manager” in the subject line.

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