COMPANY

Staff CMOS RF/PMIC Design Engineer

Description:

• Key member of a world class RFIC design team designing cutting-edge CMOS RF integrated circuits for ultra-high performance carrier-grade MIMO systems.

Requirements:

• Masters EECS strongly desired. MSEE considered for outstanding candidates. Outstanding work in RF design required
• 3+ years of work experience with CMOS RF in < 90nm
• Expert in Cadence Virtuoso tool-suite
• Experience taking your chip designs into high-volume production. Deep understanding of simulation and DFM for high-yield, high-volume manufacture
• Solid lab experience
• Superb at working hands-on with test team to supervise tests and characterize the performance of your designs

Please forward your resume to hr@quantenna.com. Please include the job title “Staff CMOS RFIC Design Engineer” in the subject.