ASIC Design Engineer

Requirements:

The candidate for ASIC Verification Engineer should meet the following criteria:
  • 3+ years experience in ASIC Verification
  • BS in Electrical Engineering (or equivalent) is a must have, MSEE is desired
  • System on Chip (SOC) Verification Experience, including AHB/AXI, CPU, Interface integration verification
  • Verification tool experience – Verilog, System-Verilog, Coverage Analysis
  • Must be familiar with various scripting languages used in verification, including Perl, Csh, Make, etc.
  • Experience verifying interfaces such as PCIe, Ethernet, DDR, USB
  • Working knowledge of networking protocols such as TCP/IP, 802.3, 802.11 a plus
  • Working knowledge of C programming language
  • Experience with Medium Access protocols a plus
  • Must be expert in Verilog RTL language
  • Must be familiar with the ASIC verification flow from feature identification to testbench development and through final tapeout sign-off
  • FPGA emulation experience a plus
  • Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging

Please forward your resume to [email protected]. Please include the job title “ASIC Design Engineer” in the subject.